发明名称 APPARATUS FOR CONTROLLING POWER MANAGEMENT OF DIGITAL SIGNAL PROCESSOR AND ITS USING POWER MANAGEMENT SYSTEM AND METHOD
摘要 An apparatus for controlling management of power consumption in a digital signal processor, and a system and a method for managing the power by using the same are provided to control dynamic and static consumed power in the unit of a detailed module and to reduce overall power consumption. A method for managing power comprises the following several steps. A PSM(Power Saving Mode) status register sets/resets a bit of a corresponding module in accordance with a PSM command received from a command decoding unit(501). A PSM flag register sets 1 to the bit of the corresponding module according as receiving module information, necessary for performing general commands, from the command decoding unit(502). The PSM status register checks the bit of the corresponding module, and if 1 is set to the bit of the corresponding module, a general command is performed as it is because power is supplied for the corresponding module(503). If 1 is not set to the bit of the corresponding module, a pipeline stall signal is transmitted to a controller for stopping progress of the pipeline, the PSM status register sets 1 to the bit of the corresponding module, power is supplied to the corresponding module, and progress of the pipeline is restarted if the corresponding module arrives at a normal status(504).
申请公布号 KR20080050938(A) 申请公布日期 2008.06.10
申请号 KR20070035237 申请日期 2007.04.10
申请人 ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 BYUN, KYUNG JIN;KOO, BON TAE;EUM, NAK WOONG
分类号 G06F1/32;G06F1/00 主分类号 G06F1/32
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