发明名称 Translation of high-level circuit design blocks into hardware description language
摘要 Translation of high-level design blocks into a design specification in a hardware description language (HDL). Each block in the high-level design is assigned to a group. A set of attributes is identical between the blocks in a group. For each group of blocks, a respective set of parameters having different values on subblocks of at least two blocks in the group is determined. An HDL specification is generated for each group. The HDL specification for a group has for each parameter in the set of parameters, a parameter input.
申请公布号 US7386814(B1) 申请公布日期 2008.06.10
申请号 US20050054864 申请日期 2005.02.10
申请人 XILINX, INC. 发明人 STROOMER JEFFREY D.;MILNE ROGER B.;FORAKER ISAAC W.;KELLY SEAN A.
分类号 G06F17/50 主分类号 G06F17/50
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