发明名称 Flash memory arrangement
摘要 A device, a method and a system for direct execution of code from a flash memory arrangement, in which a separate memory component is not required, even if a flash memory component is used which has a restriction on the size of a data block which can be read at one time. Furthermore, the flash memory arrangement is optionally implemented as a "single die" chip or device, which is more efficient for manufacturing and which also results in lower costs.
申请公布号 US7386653(B2) 申请公布日期 2008.06.10
申请号 US20010922153 申请日期 2001.08.06
申请人 SANDISK IL LTD 发明人 MORAN DOV
分类号 G06F12/06;G06F13/00;G06F9/445;G06F12/00 主分类号 G06F12/06
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