发明名称 |
Two dimensional addressing of a matrix-vector register array |
摘要 |
A processor and method for processing matrix data. The processor includes M independent vector register files which are adapted to collectively store a matrix of L data elements. Each data element has B binary bits. The matrix has N rows and M columns, and L=N*M. Each column has K subcolumns. N>=2, M>=2, K>=1, and B>=1. Each row and each subcolumn is addressable. The processor does not duplicatively store the L data elements. The matrix includes a set of arrays such that each array is a row or subcolumn of the matrix. The processor may execute an instruction that performs an operation on a first array of the set of arrays, such that the operation is performed with selectivity with respect to the data elements of the first array.
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申请公布号 |
US7386703(B2) |
申请公布日期 |
2008.06.10 |
申请号 |
US20030715688 |
申请日期 |
2003.11.18 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
SANDON PETER A.;WEST R. MICHAEL P. |
分类号 |
G06F7/00;G06F15/00;G06F9/30;G06F9/302;G06F9/312;G06F9/315;G06F9/34;G06F15/76;G06F15/78;G06F15/80;G06F17/16 |
主分类号 |
G06F7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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