发明名称 PATTERNED ELECTROLESS METALLIZATION PROCESSES FOR LARGE AREA ELECTRONICS
摘要 The present invention generally provides an apparatus and method for selectively forming a metallized feature, such as an electrical interconnect feature, on an electrically insulating surface of a substrate. The present invention also provides a method of forming a mechanically robust, adherent, oxidation resistant conductive layer selectively over either a defined pattern or as a conformal blanket film. Embodiments also generally provide a new chemistry, process, and apparatus to provide discrete or blanket electrochemically or electrolessly platable ruthenium containing adhesion and initiation layers. Aspects of the present invention may be used for flat panel display processing, semiconductor processing, or solar cell device processing. The processes described herein may be useful for the formation of electrical interconnects on substrates where the line sizes are generally larger than semiconductor devices or where the formed features are not as dense.
申请公布号 KR20080050612(A) 申请公布日期 2008.06.09
申请号 KR20087008459 申请日期 2008.04.08
申请人 APPLIED MATERIALS INC. 发明人 WEIDMAN TIMOTHY
分类号 B05D7/20 主分类号 B05D7/20
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