发明名称 Memory Circuit For Display Panel Driving and Driving Method Thereof
摘要 Provided is a circuit driving method which can minimize a problem generated by a peak current in a display memory device. Data to be transferred to a display panel is read out from a memory cell array storing binary information. The read-out data are stored in source data buffers and a plurality of source data buffers are divided into several groups and then enabled. An enable signal for each group is derived from a single enable signal and has a different delay time. In the source data buffers delayed by each group and enabled, consumption of current is distributed so that a peak current flowing in the overall source data buffer is lowered. Thus, reliability in the operation of a circuit is improved and the operation speed increases.
申请公布号 US2008129651(A1) 申请公布日期 2008.06.05
申请号 US20030560920 申请日期 2003.09.04
申请人 JEONG SEONG IK 发明人 JEONG SEONG IK.
分类号 G09G3/20;G02F1/133;G02F1/1333;G06F3/00;G06F3/147;G09G3/36;G09G5/395;H03K19/0175 主分类号 G09G3/20
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