发明名称 INTEGRATED CIRCUIT WITH IDDQ TEST FACILITIES AND IC IDDQ TEST METHOD
摘要 An IC (10) is disclosed that comprises a first power supply rail (110) and a second power supply rail (130) and a plurality of circuit portions (100, 400, 700) respectively coupled between the first power supply rail (110) and the second power supply rail (130). A first circuit portion thereof is coupled to the first power supply rail (110) via a first conductive path comprising a first enable switch (120), and to a test mode power supply rail (110, 310) via a second conductive path for enabling a quiescent current measurement (610) of the first circuit portion in a test mode of the integrated circuit (10). The second conductive path comprises a sensing switch (220) for coupling the first portion to the test mode power supply rail (110, 310) in the test mode. The test mode power supply rail may be same rail as the first power supply rail (110), in which case the IC (10) may comprise a current sensor (230) to facilitate on-chip IDDQ measurements. The IC (10) of the present invention allows for accurate IDDQ measurements of parts of the IC at little area overhead cost only.
申请公布号 WO2008044183(A3) 申请公布日期 2008.06.05
申请号 WO2007IB54072 申请日期 2007.10.05
申请人 NXP B.V.;ELVIRA VILLAGRA, LUIS;MEIJER, RINZE, I., M.;RIUS VAZQUEZ, JOSEP 发明人 ELVIRA VILLAGRA, LUIS;MEIJER, RINZE, I., M.;RIUS VAZQUEZ, JOSEP
分类号 G01R31/30 主分类号 G01R31/30
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