| 摘要 |
<P>PROBLEM TO BE SOLVED: To shorten a set-up time and a data output time without increasing a gate load at latch nodes of a sense amplifier portion. <P>SOLUTION: In a sense-amplifier type flip-flop circuit, when building up a differential sense amplifier circuit, switching elements (in this example, N-channel transistors N15 and N16) are connected between output nodes Fa and Fb of a differential input portion 12 and latch nodes n11 and n12 of a sense latch portion 11. By the action of the switching elements, the latch nodes n11 and n12 are separated from the differential input portion 12 while a clock signal CK is at "L" level (during a pre-charging period). <P>COPYRIGHT: (C)2008,JPO&INPIT |
