| 摘要 |
The preset invention provides an optical data link that prevents the internal I2C bus system from being hung up. The data link provides a CPU able to receive a reset signal and an IC (PHY) to control the physical layer to communicate with the outside of the data link, and they are coupled via the internal I2C bus system. When the data link receives a reset signal, the PHY behaves as the slave device, while, the controller behaves as the master device to output dummy clocks on the clock line of the I2C bus so as to sweep left data on the data line of the I2C bus.
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