| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a shift register circuit which has two transistors for discharging an output terminal, both being alternately changed over for the operating/suspending, in which stability of an operation at the time immediately after the above changeover is improved. <P>SOLUTION: A unit shift register SR is equipped with a transistor Q1 for supplying a clock signal CLK to the output terminal OUT and two transistors Q2A, Q2B for discharging the output terminal OUT. The unit shift register SR further includes a transistor Q5A, the gate of which is connected to a gate node N2A of the transistor Q2A, for discharging a gate node N1 of the transistor Q1, and a transistor Q5B, the gate of which is connected to a gate node N2B of the transistor Q2B, for discharging the above node N1. At the time immediately after the changeover of levels of first and second control signals VFR, /VFR for changing over the transistors Q2A, Q2B, an input of the clock signal CLK is prohibited. <P>COPYRIGHT: (C)2008,JPO&INPIT |
