| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a pulse signal processing circuit of an encoder capable of performing more surely signal detection when performing signal detection with clock synchronization. <P>SOLUTION: A signal A acquired by synchronizing a pulse signal generated corresponding to rotor displacement of a motor 2 by an encoder 1 with a clock signal CLK by a flip-flop 7 is outputted, and the edge of the synchronous signal A is detected by an EXOR gate 11, and each level of the synchronous signal A and the pulse signal is compared by a comparator circuit 18 during a rising edge of the clock signal CLK. A multiplexer 14 selects a holding signal F if the EXOR gate 11 detects the edge of the synchronous signal A and a comparison result by the comparator circuit 18 shows disagreement, and selects the synchronous signal A in other cases. <P>COPYRIGHT: (C)2008,JPO&INPIT |
