HIGHLY PARALLEL PIPELINED HARDWARE ARCHITECTURE FOR INTEGER AND SUB-PIXEL MOTION ESTIMATION

摘要

Disclosed is a pipelined motion estimation system and method. The pipelined motion estimation system includes a current frame input storage means for storing contents of a current frame and a previous frame input storage means for storing contents of one or more previous frames. A sum-of-absolute differences calculation module concurrently determines a best fit motion vector from a plurality of potential motion vectors where each of the plurality of potential motion vectors is based upon a pixel-based search pattern. A sum-of-absolute differences (SAD) logic block concurrently determines a minimum residual value from the plurality of motion vectors. The motion vector having the minimum residual value is used as a component in encoding video data.