发明名称 WAFER LEVEL CHIP SCALE PACKAGE, METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR CHIP MODULE INCLUDING THE WAFER LEVEL CHIP SCALE PACKAGE
摘要 Provided are a wafer level chip scale package in which a redistribution process is applied at a wafer level, a manufacturing method thereof, and a semiconductor chip module including the wafer level chip scale package. The wafer level chip scale package includes a semiconductor chip having a bonding pad, a first insulating layer disposed on the semiconductor chip so as to expose the bonding pad, a redistribution line disposed on the exposed bonding pad and the first insulating layer, a sacrificial layer disposed below a redistribution pad of the redistribution line, a second insulating layer disposed on the redistribution line so as to expose the redistribution pad and including a crack inducement hole disposed beside the sacrificial layer, and an external connection terminal attached to the redistribution pad.
申请公布号 US2008128905(A1) 申请公布日期 2008.06.05
申请号 US20070950251 申请日期 2007.12.04
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE IN-YOUNG;LEE DONG-HO;KIM NAM-SEOG;CHUNG HYUN-SOO;LEE HO-JIN;PARK MYEONG-SOO
分类号 H01L23/488;H01L21/44 主分类号 H01L23/488
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