| 摘要 |
An LCD(Liquid Crystal Display) is provided to design an area of a portion, where a common voltage line is overlapped with plural gate link lines, to be proportional to a length of an overlapped gate link line, thereby efficiently dealing with static electricity generated during a TFT(Thin Film Transistor) array substrate manufacturing process. In a substrate(100), an active area(AA) and an non-active area(NA) are formed. The active area includes pixels defined by crossing of plural gate lines(101) and data lines(102). The non-active area is a peripheral area of the active area. A gate link line(103) is formed in the non-active area, and connected with the gate line. A common voltage line(105) is formed to be overlapped with the gate link line. An area of a portion where the common voltage line is overlapped with each gate link line is proportional to a length of the overlapped gate link line. A part where the common voltage line is overlapped with the gate line has a minimum area in a part where the gate link line is the shortest, and has a maximum area in a part where the gate iink line is maximum. |
