发明名称 Self-aligned MIM capacitor process for embedded DRAM
摘要 A semiconductor device includes a group of capacitors and a trench. Each capacitor includes a first conductive material layer, a dielectric layer, and a second conductive material layer. The dielectric layer is located between the first and second conductive material layers. The first conductive material layer coats an inside surface of a cup-shaped opening formed in an insulating layer. The trench is formed in the insulating layer. The trench extends between and crosses each of the capacitors in the group. The dielectric layer and the second conductive material layer are formed over the first conductive material layer in the cup-shaped openings and over an inside surface of the trench. The second conductive material layer extends between the capacitors of the group via the trench. Also, the second conductive material layer forms top electrodes for the capacitors of the group.
申请公布号 US7381613(B2) 申请公布日期 2008.06.03
申请号 US20050031717 申请日期 2005.01.07
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 TU KUO-CHI
分类号 H01L21/20;H01L21/02;H01L21/311;H01L21/8242;H01L27/108 主分类号 H01L21/20
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