发明名称 |
Two terminal memory array having reference cells |
摘要 |
A memory including reference cells is provided. The memory has address decoding circuitry and an array of memory cells that are non-volatile and re-writable. Each memory cell has a two terminal memory plug that is capable of experiencing a change in resistance. Sensing circuitry compares activated memory cells to a reference level. The reference level is typically generated by at least one reference cell that can be selected at the same time the memory cell is selected.
|
申请公布号 |
US7382644(B2) |
申请公布日期 |
2008.06.03 |
申请号 |
US20070725045 |
申请日期 |
2007.03.16 |
申请人 |
UNITY SEMICONDUCTOR CORPORATION |
发明人 |
RINERSON DARRELL;CHEVALLIER CHRISTOPHE J.;LONGCOR STEVEN W. |
分类号 |
G11C11/00 |
主分类号 |
G11C11/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|