发明名称 |
Differential output circuit with reduced differential output variation |
摘要 |
In a differential output circuit, a second amplifier has a positive terminal connected to a second fixed potential and a negative terminal to a fifth switch at a first terminal. First and second switches are connected at a point connected to the fifth switch at a second terminal and to a first load. Third and fourth switches are connected at a point connected to the fifth switch at a third terminal and to a second load. The second terminal is connected to the first terminal when the second and third switches turn on. The third terminal is connected to the first terminal when the first and fourth switches turn on.
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申请公布号 |
US7382160(B2) |
申请公布日期 |
2008.06.03 |
申请号 |
US20070797807 |
申请日期 |
2007.05.08 |
申请人 |
RENESAS TECHNOLOGY CORP. |
发明人 |
NAGANO HIDEO;AOYAGI KEISUKE;SUZUKI MASAO |
分类号 |
H03K19/0175;H03K19/094;H03F3/45 |
主分类号 |
H03K19/0175 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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