发明名称 Power supply circuit for delay locked loop and its method
摘要 A delay locked loop (DLL) power supply circuit for use in a semiconductor memory device, including: a DLL power supplier for supplying a DLL power supply voltage to a DLL in response to a reference voltage and a clock enable exit pulse signal; and a pulse signal generator for generating the clock enable exit pulse signal in response to a clock enable signal.
申请公布号 US7382666(B2) 申请公布日期 2008.06.03
申请号 US20060641350 申请日期 2006.12.19
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE KANG-SEOL
分类号 G11C7/00;G11C5/14;G11C8/00;G11C11/407 主分类号 G11C7/00
代理机构 代理人
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