发明名称 Method and system for design verification and debugging of a complex computing system
摘要 A method and system for element testing is described. A first module is generated and has at least one associated state. A second module is generated based on the first module. The second module is associated with a test element. The test element is controlled based on the second module and the states, and the test element is applied to a design-under-test. Data flow information, determined while applying the test element to the design-under-test, is store in a transaction database, and the data items read and modified by the data flow information are stored in a data database. At least one result is determined based on the application of the test element to the design-under-test.
申请公布号 US7383168(B2) 申请公布日期 2008.06.03
申请号 US20030337559 申请日期 2003.01.06
申请人 FUJITSU LIMITED 发明人 MUKHERJEE RAJARSHI;MIMA TOSHIYA;NAKAYAMA YOZO
分类号 G06F9/45;G01R31/317;G06F17/50 主分类号 G06F9/45
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