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发明名称
PARALLEL AMPLIFIER ARCHITECTURE USING DIGITAL PHASE CONTROL TECHNIQUES
摘要
申请公布号
KR100833832(B1)
申请公布日期
2008.06.02
申请号
KR20027000780
申请日期
2002.01.18
申请人
发明人
分类号
H03F1/22
主分类号
H03F1/22
代理机构
代理人
主权项
地址
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