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发明名称
积体电路装置和嵌入式记忆体测试方法
摘要
一种积体电路装置,包括嵌入式记忆体和内建自我测试电路,嵌入式记忆体包括复数记忆体巨集,内建自我测试电路耦接复数记忆体巨集以同时操作复数记忆体巨集,其中当记忆体巨集同时运作时,内建自我测试电路被设定为从记忆体巨集之资料输出端中选择一独立记忆体巨集之资料输出端以作测试分析之用。
申请公布号
TW200823908
申请公布日期
2008.06.01
申请号
TW096144958
申请日期
2007.11.27
申请人
台湾积体电路制造股份有限公司
发明人
郑玮嘉;谢祯辉
分类号
G11C29/12(2006.01)
主分类号
G11C29/12(2006.01)
代理机构
代理人
洪澄文;颜锦顺
主权项
地址
新竹市新竹科学工业园区力行六路8号
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