发明名称 LOW VOLTAGE CIRCUIT WITH VARIABLE SUBSTRATE BIAS
摘要 In one form a circuit has a bias stage having an input signal terminal for receiving an input signal. The circuit modifies the input signal with a drive stage to provide an output signal in complement form. A drive transistor in the drive stage of the circuit has a bulk that is connected to a terminal of a load and to a control electrode coupled to the input signal terminal. A bias transistor in the bias stage of the circuit has a bulk that is directly connected to the terminal of the load and to the bulk of the drive transistor. The bias transistor has a control electrode coupled to the input signal terminal. The input signal biases the bulks of the drive transistor and the bias transistor and reduces transistor threshold voltage. Linearity of circuit output impedance is improved and RF interference reduced. Lower voltage operation is also provided.
申请公布号 US2008122520(A1) 申请公布日期 2008.05.29
申请号 US20060424132 申请日期 2006.06.14
申请人 KASE KIYOSHI;TRAN DZUNG T;LEN MAY 发明人 KASE KIYOSHI;TRAN DZUNG T.;LEN MAY
分类号 G05F3/02 主分类号 G05F3/02
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