发明名称 INTEGRATED CIRCUIT DIE AND MANUFACTURING METHOD THEREFOR
摘要 <P>PROBLEM TO BE SOLVED: To provide an integrated circuit having small resistance for internal bus and other conductive paths, and to provide its manufacturing method. <P>SOLUTION: A comparatively thick metal strap layer is formed on the bus and the other conductive paths. The metal strap layer is formed, by etching a passivation layer covering the upper sides of the bus, and the like, to form a longitudinal groove, and by plating the thick metal layer in the groove. It is preferable that nickel be plated. The resistance of the bus can be reduced significantly by the metal strap layer. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008124516(A) 申请公布日期 2008.05.29
申请号 JP20080033544 申请日期 2008.02.14
申请人 SILICONIX INC 发明人 WILLIAMS RICHARD K
分类号 H01L21/3205;H01L21/8234;H01L23/482;H01L23/52;H01L27/088;H01L29/10;H01L29/417;H01L29/78 主分类号 H01L21/3205
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