发明名称 INTERFACE TESTING CIRCUIT AND METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an interface test circuit and a method including a high-speed input/output circuit (HSIO) test circuit and method which can be used for assembled self-test (BIST). <P>SOLUTION: In one embodiment, a device comprises a conductor, and a transmitter including a transmitter test circuit which embeds test characteristics in a test pattern signal and transmits the test pattern signal to the conductor. Also in one embodiment, the device comprises the conductor which conveys the test pattern which has the embedded test characteristics, and a receiver test circuit which judges whether the test pattern signal is received, and test characteristics are extracted, and extracted test characteristics adapt a predetermined test characteristics. Other embodiments are indicated by the specifications and claims. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008122399(A) 申请公布日期 2008.05.29
申请号 JP20070322609 申请日期 2007.11.15
申请人 SILICON IMAGE INC 发明人 SUL CHINSONG;KIM HEON C;AHN GIJUNG
分类号 G01R31/3183;G01R31/28 主分类号 G01R31/3183
代理机构 代理人
主权项
地址