MEMORY CONSISTENCY PROTECTION IN A MULTIPROCESSOR COMPUTING SYSTEM

摘要

A method and apparatus to protect memory consistency in a multiprocessor computing system (10) are described, in particular relating to program code conversion such as dynamic binary translation. The exemplary multiprocessor computing system (10) provides a memory (18) and a plurality of processors (13a, 13b) and a controller/translator unit (19) arranged to convert subject code (17) into at least first and second target code portions (21a, 21b) executable on the plurality of processors (13a, 13b). The controller/translator unit (19) comprises an address space allocation unit (196) to provide a plurality of virtual address space regions (181) and direct the target code portions (21a, 21b) to access the memory (18) therethough; a shared memory detection unit (197) to detect a request to access a shared memory area (182) which is accessible by both target code portions (21a, 21b) and to identify at least one group of instructions (211) in the first target code portion (21a) which access the shared memory area (182); and a memory protection unit (198) to selectively apply memory consistency protection in relation to accesses to the shared memory area (182) by the identified group of instructions (211). In one exemplary embodiment, at least a first code portion (21a) executes under a first memory consistency model. Explicit or implicit sharing memory (182) is detected and a block (211) in the first code portion (21a) containing instructions that access the shared memory area (182) is subject to the memory consistency protection to execute under a second memory consistency model when accessing the detected shared memory area (182).