发明名称 Tiled memory array for full search motion estimation
摘要 A plurality of memory circuits and a logic circuit. The plurality of memory circuits may be configured to store a plurality of pixels. The pixels may be used in a motion estimation stage of a video encoder. The logic circuit may be configured to (i) control which of the pixels are stored in which of the plurality of memory banks and (ii) control accessing of the plurality of pixels.
申请公布号 US2008123744(A1) 申请公布日期 2008.05.29
申请号 US20060604597 申请日期 2006.11.27
申请人 LSI LOGIC CORPORATION 发明人 PEARSON ERIC C.
分类号 H04N11/02 主分类号 H04N11/02
代理机构 代理人
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