发明名称 SEMICONDUCTOR PACKAGE AND ITS MANUFACTURING METHOD
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor package where wiring is fined over a conventional limit and its manufacturing method. SOLUTION: The semiconductor package 100 includes a buildup wiring structure 20 in which an insulating layer 16 composed of a resin and a wiring layer 18 composed of a conductor plating layer are laminated, a fined wiring structure 30 which is formed by patterning a taped conductor foil 34' on a conductor taping resin tape 32 and contains a wiring layer 34 finer than the wiring 18 of the buildup wiring structure 20, and a joining layer 25 which is composed of a thermoplastic resin and is interposed between the buildup wiring structure 20 and fine wiring structure 30 to join them. The manufacture is carried out through processes of preparing the buildup wiring structure 20 by an optional method, preparing the fine wiring structure 30 by a subtractive method separately, and joining both structures 20, 30 with the joining layer 25. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008124398(A) 申请公布日期 2008.05.29
申请号 JP20060309452 申请日期 2006.11.15
申请人 SHINKO ELECTRIC IND CO LTD 发明人 KOYAMA TOSHINORI
分类号 H01L23/12;H05K3/46 主分类号 H01L23/12
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