| 摘要 |
PROBLEM TO BE SOLVED: To solve the problem that a triple oxide process is required, thus resulting in cost-process increase, in the case of incorporating a logic circuit such as a timing generator and reducing the voltage in a solid-state imaging element with a gate oxide film thickness of an amplifying transistor of a pixel thinned. SOLUTION: At least a part of the film thickness of the gate oxide film of the transistor with a voltage applied between a gate-source and a gate-drain in the logic circuit, a transistor in a shift register, and an analog circuit limited to not more than the power source voltage is set to identical to the thickness of the gate oxide film of the amplifying transistor of the pixel. This reduces the noise owing to the thinned gate oxide film of the amplifying transistor of the pixel, reduces a power consumption owing to the lowered voltage of the logic circuit and the shift register, quickens the speed, and lowers the noise of the device without an addition of a process after the dual oxide process. Further conforming the thickness of the gate oxide film of the MOS capacitor to that of the amplifying transistor reduces the chip size. COPYRIGHT: (C)2008,JPO&INPIT
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