PROCESSOR AND INTERRUPTION CONTROL METHOD

摘要

PROBLEM TO BE SOLVED: To provide a processor for properly performing task processing and interrupt processing from a higher priority order under the consideration of the state of a processor such as an interruption inhibition. SOLUTION: This processor is provided with: unit processors P0 to P3; a register 301 for priority management for managing the management information of the unit processors P0 to P3; and an external interrupt control part 11 for selecting the unit processor which performs interrupt processing among the unit processors P0 to P3 based on the management information and the priority order of the interrupt processing requested to the unit processors P0 to P3, and for transmitting an interrupt processing request to the selected unit processor. The external interrupt control part 11 selects the unit processor which performs processing whose priority order is the lowest regardless of whether the requested interrupt processing and the processing performed by the unit processors P0 to P3 is task processing or external interrupt processing. COPYRIGHT: (C)2008,JPO&INPIT