发明名称 SIGNAL AMPLIFICATION DEVICE
摘要 A signal amplification device which uses inexpensive standard CMOS and yet is capable of high-accuracy threshold setting. An offset voltage generator detects the direct-current level of an input signal, and generates a positive or negative offset voltage signal. A peak detector outputs, as a peak value, the positive offset voltage signal if the level thereof is higher than the maximum level of the input signal, or the maximum level of the input signal if the maximum level is higher than the positive offset voltage signal. A bottom detector outputs, as a bottom value, the negative offset voltage signal if the level thereof is lower than the minimum level of the input signal, or the minimum level of the input signal if the minimum level is lower than the negative offset voltage signal. A voltage divider subjects the peak and bottom values to voltage division, to generate a threshold level.
申请公布号 US2008122539(A1) 申请公布日期 2008.05.29
申请号 US20060516785 申请日期 2006.09.07
申请人 FUJITSU LIMITED 发明人 IDE SATOSHI
分类号 H03F3/45 主分类号 H03F3/45
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