发明名称 Gain and linearity matching for multi-channel time-interleaved pipelined ADC
摘要 By constructing the stages of a pipelined analog to digital converter (ADC) such that they are in close proximity while sharing a voltage reference, bias, and power supply, the linearity of the ADC's will match since the relatively large devices that now dictate the ADC linearity are in close proximity to one another. Supply and reference IR drops are also matched reducing gain and linearity mismatch. Based on this, it is possible to construct a shared multi-channel ADC with exceptionally good matching of gain, phase, and linearity without additional hardware to match the channels.
申请公布号 US2008122673(A1) 申请公布日期 2008.05.29
申请号 US20060607133 申请日期 2006.11.29
申请人 DYER KENNETH C 发明人 DYER KENNETH C.
分类号 H03M1/12 主分类号 H03M1/12
代理机构 代理人
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