Digital signal processing apparatus and method for multiply-and-accumulate operation

摘要

A digital signal processing apparatus and method for MAC operation are disclosed. The DSP apparatus including: a first memory for storing a plurality of first operands; a second memory for storing a plurality of second operands; a MAC processor including a plurality of parallel MAC blocks disposed in parallel for performing a parallel MAC operation on a first operand outputted from the first memory in parallel and a second operand outputted from the second memory in parallel using the parallel MAC blocks, wherein the first memory and the second memory include dual port memories for outputting the plurality of the first operands and the second operands to the plurality of parallel MAC blocks in parallel.