发明名称 SEMICONDUCTOR MEMORY
摘要 <p>A semiconductor memory is provided to embody a fin-type memory cell having a suitable structure for mixed mounting such that the fin-type memory cell has a logic circuit made of fin-FET(field effect transistor) by including a floating gate formed along the lateral surface of a fin-type active region and two control gate electrodes formed at both sides of the floating gate. A memory cell array is composed of memory cells(MC) that are arranged in first and second directions perpendicular to each other in an array shape. Wordlines are extended in a third direction between the first and second directions, connected to the gates of the memory cells. The memory cells commonly connected one of the wordlines. A source line is extended in the first direction, connected to an end part of the source of the memory cell. A bitline is extended in the second direction, connected to an end part of the drain of the memory cell.</p>
申请公布号 KR20080047338(A) 申请公布日期 2008.05.28
申请号 KR20080042706 申请日期 2008.05.08
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 WATANABE HIROSHI;NISHI YOSHIFUMI;KINOSHITA ATSUHIRO
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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