发明名称 ESD PROTECTION NETWORK USED FOR SOI TECHNOLOGY
摘要 <p>ESD PROTECTION NETWORK USED FOR SOI TECHNOLOGY A method for forming an electrostatic discharge device using silicon-on- insulator technology is described. A P+ region is implanted within an N-well in a substrate and an N+ region is implanted in the substrate but not in the N-well. An oxide layer is patterned to provide openings to the substrate. An epitaxial silicon layer is grown within the openings and overlying the oxide layer. Shallow trench isolation regions are formed within the epitaxial layer extending to the oxide layer. Gate electrodes and source and drain regions are formed in and on the epitaxial layer between the STI regions. First contacts are opened through an interlevel dielectric layer to underlying source and drain regions. Second contact openings are opened through the interlevel dielectric layer, shallow trench isolations, and the oxide layer to the N+ region and P+ region. The contact openings are filled with a conducting layer to complete the ESD device.</p>
申请公布号 SG142151(A1) 申请公布日期 2008.05.28
申请号 SG20050001771 申请日期 2001.07.11
申请人 CHARTERED SEMICONDUCTOR MANUFACTURING LTD 发明人 JUN SONG;CHEONG ANG TING;YEE LOONG SANG;FONG QUEK SHYUE
分类号 H01L;H01L21/82;H01L21/84;H01L23/62;H01L27/01;H01L27/02;H01L27/12;H01L31/0392;(IPC1-7):H01L23/62;H01L31/039 主分类号 H01L
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