发明名称 Method and apparatus for timing modeling
摘要 Method and apparatus for timing modeling is described. More particularly, wire information, including wire lengths, is obtained from a routing output. Signals associated with such wire information are classified as input or output signals from an embedded core. Respective templates are automatically selected for the input signals and the output signals, respectively, at least in partial response to the wire lengths. Furthermore, timing information for the embedded core is obtained and classified according to condition, and the input signals and the output signals from the embedded core are determined to obtain rise and fall timing information for such signals.
申请公布号 US7379855(B1) 申请公布日期 2008.05.27
申请号 US20020261420 申请日期 2002.09.30
申请人 XILINX, INC. 发明人 ODA SHIZUKA;BURNLEY RICHARD P.
分类号 G06F17/50;G06F9/00;G06F9/44;G06F9/45;G06F17/00 主分类号 G06F17/50
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