| 摘要 |
Apparatus are provided including device memory, hardware entities, a sub- image cell value cache, and a cache write operator. At least some of the har dware entities perform actions involving access to and use of the device mem ory. The hardware entities include 3D graphics circuitry to process, for rea dy display, 3D images from primitive objects. The cache is separate from the device memory, and is provided to hold data, including buffered sub-image c ell values. The cache is connected to the 3D graphics circuitry so that pixe l processing portions of the 3D graphics circuitry access the buffered sub-i mage cell values in the cache, in lieu of the pixel processing portions dire ctly accessing the sub-image cell values in the device memory. The write ope rator writes the buffered sub-image cell values to the device memory under d irection of a priority scheme. The priority scheme preserves in the cache bo rder cell values bordering one or more primitive objects.
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