发明名称 REFERENCE POTENTIAL GENERATION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a reference potential generation circuit operable with a low power supply voltage for outputting a reference potential by reducing any influence due to the threshold variance of a transistor. SOLUTION: This reference potential generation circuit is provided with a diode D110 connected between a ground level and a V-node; a resistance R110 connected between the V-node and the drain of a PMOS transistor T1; a diode 120 connected between the ground level and a Vdio node; a resistance R121 connected between the Vio node and a V+node; a resistance R120 connected between the V+node and the drain of the first PMOS transistor T1; an operating amplifier 30 for inputting the V+node and the V-node; and a resistance Rout connected between the ground level and the drain of the PMOS transistor T2, wherein the output of the operating amplifier 30 is input to the gates of the PMOS transistors T1 and T2, and a reference potential is output from the resistance Rout. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008117215(A) 申请公布日期 2008.05.22
申请号 JP20060300535 申请日期 2006.11.06
申请人 TOSHIBA CORP 发明人 OGIWARA TAKASHI;TAKASHIMA DAIZABURO
分类号 G05F3/24 主分类号 G05F3/24
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