发明名称 Semiconductor memory device having the operating voltage of the memory cell controlled
摘要 An SRAM circuit operates at a reduced operation margin, especially at a low operating voltage by increasing or optimizing the operation margin of the SRAM circuit. The threshold voltage of the produced transistor in the SRAM circuit is detected to compare the operating voltage of a memory cell with the operating voltage of a peripheral circuit in order to adjust it to the optimum value, and the substrate bias voltage is further controlled.
申请公布号 US2008117692(A1) 申请公布日期 2008.05.22
申请号 US20080003970 申请日期 2008.01.04
申请人 YAMAOKA MASANAO;OSADA KENICHI 发明人 YAMAOKA MASANAO;OSADA KENICHI
分类号 G11C5/14;G11C11/413;G11C11/417;G11C11/419;G11C11/4193;G11C29/02 主分类号 G11C5/14
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