REGISTER TRANSFER LEVEL (RTL) TEST POINT INSERTION METHOD TO REDUCE DELAY TEST VOLUME

摘要

PROBLEM TO BE SOLVED: To provide a new method for identifying and inserting test points in register transfer level RTL for reducing the volume of scan-base transition test patterns. SOLUTION: This method includes inserting test points into a circuit for reducing the number of specified bits required for transition fault testing of the circuit by reducing the dependency of a second time-frame pattern of the circuit on a first time-frame pattern of the circuit. Preferably, the step of inserting the test points includes controlling directly scan flip-flops of the circuit in the second time-frame requiring a number of scan flip-flops to be specified in the first time-frame for reducing the number of specified bits to detect transition faults. COPYRIGHT: (C)2008,JPO&INPIT