| 摘要 |
PROBLEM TO BE SOLVED: To generate a model, as a general programming description, capable of verifying, at a cycle precision level, hardware operating in accordance with a multiphase clock. SOLUTION: A behavioral description 47 of the hardware operating in accordance with a multiphase clock is analyzed by a syntactic analysis/lexical analysis processing means 41, the hardware is split by a clock domain split processing means 42 into clock domains corresponding to respective clock systems, and CDFGs 48A, 48B, and so on are generated by a CDFG generation means 43 for the respective clock domains. The CDFGs 48A, 48B, and so on are scheduled and allocated for respective states by a scheduling/state allocation means 44 according to clock frequencies for respective blocks, and cycle precision models of the hardware are generated by a cycle precision model generation means 45 for the respective states, as descriptions represented in a general programming language. COPYRIGHT: (C)2008,JPO&INPIT
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