发明名称 Performing an N-bit write access to an MxN-bit-only peripheral
摘要 A system-on-chip ( 100 ) includes a 16-bit DSP ( 102 ), a 16-bit data bus ( 202 ) coupled to the DSP, at least one 32-bit-only peripheral ( 110 ), a 32-bit data bus ( 212 ) coupled to the peripheral, and a bridge ( 108 ), including a write merge system ( 200 ), coupled between the 16-bit and 32-bit buses. A method of the write merge system includes pre-storing addresses of peripherals in a memory map structure ( 220 and 221 ), receiving 16-bit data and a write transaction from the DSP for modifying sixteen bits of a 32-bit data location of the peripheral; reading 32-bit contents of the data location of the peripheral; multiplexing the received 16-bit data with the read 32-bit contents; and writing a new 32-bit word, including the modified sixteen bits and an unmodified sixteen bits, to the data location of the peripheral, without any intervention from the DSP subsequent to receiving the write transaction.
申请公布号 US7376777(B2) 申请公布日期 2008.05.20
申请号 US20050233915 申请日期 2005.09.23
申请人 FREESCALE SEMICONDUCTOR, INC. 发明人 COFFEE CLARENCE K.;HARTUNG EYTAN
分类号 G06F13/36;G06F13/12;G06F13/40 主分类号 G06F13/36
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