发明名称 |
COMPLEX MULTIPLIER AND TWIDDLE FACTOR GENERATOR |
摘要 |
A complex multiplier and a twiddle factor generator are provided to reduce the number of multipliers included in the complex multiplier so as to decrease complexity of hardware design. A complex multiplier(200) includes a first adder/subtracter(210), a second adder/subtracter(220), a first multiplier(230), a second multiplier(240), a multiplexer(250) and a controller(260). The first adder/subtracter selectively performs addition or subtraction on the real number of a complex and a first twiddle factor according to a first signal. The second adder/subtracter selectively carries out addition or subtraction on the imaginary number of the complex and a second twiddle factor according to a second signal. The first multiplier multiplies the result of the first adder/subtracter by a third twiddle factor. The second multiplier multiplies the result of the second adder/subtracter by a fourth twiddle factor. The multiplexer selectively outputs the results of the first and second multipliers as a real output signal or an imaginary output signal. The controller provides the first, second and third signals.
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申请公布号 |
KR100829509(B1) |
申请公布日期 |
2008.05.16 |
申请号 |
KR20070018935 |
申请日期 |
2007.02.26 |
申请人 |
ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE, YOUNG HA;PARK, YOUN OK |
分类号 |
G06F7/487;G06F7/50;G06F7/52 |
主分类号 |
G06F7/487 |
代理机构 |
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地址 |
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