发明名称 DIGITAL TELEVISION RECEIVER
摘要 PROBLEM TO BE SOLVED: To provide a system which performs an operation analysis of a digital television receiver without changing the performance of a CPU at all. SOLUTION: The system is equipped with a tuner 1, a demodulator 2, a TS decoder 3, an AV decoder 4, a VOUT 5, an AOUT 6, a CPU 8 controlling an OSD generator 7, and a Co-processor 11 which performs the operation analysis and a stream error analysis of a digital receiver 100 using notification signals C8 from the CPU 8 as triggers on the basis of information stored in a memory 10, so that the system is capable of performing the operation analysis of the digital television receiver 100 without increasing any load imposed on the regular operation of the CPU 8. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008113272(A) 申请公布日期 2008.05.15
申请号 JP20060295146 申请日期 2006.10.31
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIKI DAISUKE;NISHIO TOSHIAKI
分类号 H04N5/445;H04N7/173;H04N17/04 主分类号 H04N5/445
代理机构 代理人
主权项
地址