MESOCHRONOUS CLOCK SYSTEM AND METHOD TO MINIMIZE LATENCY AND BUFFER REQUIREMENTS FOR DATA TRANSFER IN A LARGE MULTI-PROCESSOR COMPUTING SYSTEM
摘要
<p>A mesochronous clock system and method to minimize latency and buffer requirements for data transfer in a large multiprocessor computing system. A stream of data is transferred from a first clock domain with a first clock signal to a second clock domain with a second clock signal. The first and second clock signals have a mesochronous relationship. The first clock signal is sampled in the second clock domain. In response to the sampling of the first clock signal, a modified version of the first clock signal is formed having a known phase relationship to the second clock signal. A parallel form of the received data is formed under the control of modified version of the first clock signal. In response to the sampling of the first clock signal, a subset of contiguous bits of the parallel data is selected for use in the second clock domain.</p>
申请公布号
WO2008057829(A2)
申请公布日期
2008.05.15
申请号
WO2007US82859
申请日期
2007.10.29
申请人
SICORTEX, INC.;GODIWALA, NITIN;REILLY, MATTHEW, H.