发明名称 System and method for automatic elimination of connectivity mismatches during construction of a mask layout block, maintaining process design rule correctness
摘要 A system and method for automatic elimination of connectivity mismatches during construction of a mask layout block, maintaining the process design rules (DRC Clean) and layout connectivity (LVS Clean) correctness are disclosed. The method includes analyzing a selected polygon or net for connectivity, in a mask layout block and comparing it to a netlist that is associated with the polygon or net. The method includes comparing a physical connection in a mask layout database within a commercial layout editor to a corresponding connection in a schematic netlist and/or external constraints file. A connectivity mismatch is identified if the physical connection in the commercial layout editor database does not match the same connection in the netlist and/or external constraints file. When a mismatch is identified the connectivity error is graphically presented in the mask layout database within commercial layout editor. The method and system also provides an option to automatically correct the connectivity mismatch during the construction of the mask layout block within commercial layout editor using the editor's commands and functions.
申请公布号 US2008115102(A1) 申请公布日期 2008.05.15
申请号 US20060598422 申请日期 2006.11.14
申请人 RITTMAN DAN 发明人 RITTMAN DAN
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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