| 摘要 |
An analogue to digital converter comprises a first ordered set of nodes 42 defined by circuitry such that each node is at a respective voltage, the voltages on the nodes being in an orderly progression between the voltage of a first current source 40 and the voltage of a first current sink 45. A second ordered set of nodes 48 is defined by circuitry such that each node is at a respective voltage, the voltages on the nodes being in an orderly progression between the voltage of a second current source 52 and the voltage of a second current sink 47. A first input node 44 is one of the nodes in the first set, there being at least one node between the first input node and each of the first current source 40 and the first current sink 45. A second input node 49 is one of the nodes in the second set 48, there being at least one node between the second input node and each of the second current source 52 and the second current sink 47. A first comparator 55 has its first input connected to the first input node 44 and its second input connected to the second input node 49. Each second comparator has its first input connected to a node between the first input node 44 and the first current source 40 and its second input connected to a node between the second input node 49 and the second current sink 47. Each third comparator has its first input connected to a node between the first input node 44 and the first current sink 45 and its second input connected to a node between the second input node 49 and the second current source 52. Such an arrangement allows the input range to be almost the entire rail-to-rail voltage range. |
