发明名称 |
Extendable squarer and operation method for processing digital signals |
摘要 |
An extendable squarer for processing digital signals, suitable for processing a square operation for n-bit data is disclosed. The extendable squarer comprise a bit expanding circuit and a plurality of operating units. The bit expanding circuit comprises n-1 bit expanding output terminals for outputting a plurality of bit expanding data. The operation units receive a plurality of bit codes of the n-bit data corresponding thereto according to the binary weight. In addition, except for bit code of the most-significant bit, the other operation units receive the corresponding bit expanding data output by the bit expanding circuit respectively. The present invention generates the square operation value of the n-bit data based on the corresponding bit expanding data and bit codes.
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申请公布号 |
US7373370(B2) |
申请公布日期 |
2008.05.13 |
申请号 |
US20040899734 |
申请日期 |
2004.07.26 |
申请人 |
CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY, ARMAMENTS BUREAU, M.N.D. |
发明人 |
TIEN SHI-HO;MENG CHING-CHUN;CHU TZU-YING;GAU YOW-LING |
分类号 |
G06F7/38 |
主分类号 |
G06F7/38 |
代理机构 |
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