发明名称 Voltage level conversion circuit
摘要 A voltage level conversion circuit is provided with a level converter for converting a VDD 1 system input signal into a VDD 2 system signal, and a NOT circuit for inverting the level-converted input signal and outputting the inverted signal, and the outputs of VDD 1 system NOT circuits constituting the level converter are input to only high breakdown voltage transistors in the level converter while a signal having a logical voltage level corresponding to the low power supply voltage VDD 2 is input to low breakdown voltage transistors, and further, only the input signal level-converted by the level converter is input to the NOT circuit.
申请公布号 US7372314(B2) 申请公布日期 2008.05.13
申请号 US20050132272 申请日期 2005.05.19
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 HIRANO HIROSHIGE
分类号 H03K19/0185;H03L5/00;H03K3/012;H03K3/356;H03K17/10 主分类号 H03K19/0185
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