| 摘要 |
A comparator circuit for reducing current consumption in a low consumption mode while suppressing the generation of glitches during a transitional period. The comparator circuit includes a comparison core circuit unit, a monitor circuit unit formed by a first transistor, and a nonlinear amplification circuit. The comparison core circuit includes second and third transistors connected to a constant current source. The source terminal and gate terminal of the first transistor have the same connection as the source terminal and gate terminal of the third transistor. The current flowing to the first transistor is supplied to the nonlinear amplification circuit. The nonlinear amplification circuit amplifies the supplied current with an incorporated constant current source and supplies the amplified current to the source terminals of the second and third transistors of the comparison core circuit.
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