| 摘要 |
A method for forming a dual damascene of a semiconductor device is provided to increase etch endurance and improve an etch process margin by performing an etch process for forming a dual damascene pattern while using an MFHM(multi function hard mask) layer and an SOC(spin on carbon) layer. A semiconductor substrate(100) is prepared which has a first insulation layer(102), an etch stop layer(104) and a second insulation layer(106). An MFHM layer and an SOC layer are formed on the second insulation layer, containing silicon. A heat treatment can be performed to harden the MFHM layer and the SOC layer. The SOC layer, the MFHM layer, the second insulation layer and the first insulation layer are partially etched to form a contact hole(116). The SOC layer, the MFHM layer and the second insulation layer are etched to form a trench(122).
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